Design Engineer


About the job

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

Member of Technical Staff: IP RTL Design Integration

The Role

AMD’s strategic focus is on developing one-of-a-kind solutions through its Strategic Silicon Solutions (S3) based on the extensive set of intellectual property (IP) amassed across AMD processors, graphics and multimedia. Providing to customers a level of flexibility and differentiation that goes beyond standard AMD products, our business unit takes AMD to a new level of customer-centric design by integrating these building blocks with customer-specific IP to create tailor-made solutions using a flexible System-on-a-Chip (SoC) design methodology. Our business unit features a strong team of engineers who have design wins in all major gaming consoles. They are exceptional and specialists in graphics and compute processing. The PlayStation 5 (PS5) from Sony Computer Entertainment Inc. (SCEI), the Xbox Series X from Microsoft are some examples of AMD’s Strategic Silicon Solutions.

The Person

Excellent problem solving, analytical, and debug skills
Must be a self-starter and able to independently drive tasks to completion
Strong verbal and written communication skills to work with team members across multiple sites

Key Responsibilities

Design of IP subsystems with integration of AMD and other 3rd party IP
Solve challenging technical issues to meet program commitments
Perform quality checks (lint, CDC, and power rule checks) of power-gated digital designs
Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC
Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up

Preferred Experience

6+ years full-time experience in IP hardware design
Experience with embedded processors and data fabric architectures
Prior technical leadership experience, subject matter expert
Outstanding problem-solving and analytical skills
Outstanding interaction skills while communicating both written and verbally
Ability to work with multi-level functional teams across various geographies
Highly organized, able to prioritize and balance multiple work streams while working to meet and exceed goals
Experience with 3rd party IP integration
Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs
Power saving techniques, including clock gating and UPF-based power gating
Detailed understanding of ASIC design flows
Verilog lint tools (Spyglass) and verilog simulation tools (VCS)
Clock domain crossing (CDC) tools (0-in)
Power domain checking tools (VC_LP)
Strong Unix scripting and utilities (Shell, Perl, TCL, XML, Ruby, makefiles) for analysis and automation

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